1. Field of the Invention
The present invention relates to a semiconductor test device which conducts tests on an IC (Integrated Circuit), an LSI (Large Scale Integration), and the like.
Priority is claimed on Japanese Patent Application No. 2007-295698, filed Nov. 14, 2007, the content of which is incorporated herein by reference.
2. Description of Related Art
FIG. 4 is a block diagram showing a configuration of principal portions of a conventional semiconductor test device. As shown in FIG. 4, the conventional semiconductor test device 100 includes a pin electronics unit 110, selectors 120 and 130, and a time measuring circuit 140. The semiconductor test device 100 conducts various kinds of tests on a device under test (hereinafter, referred to as a “DUT”) 200 by using signals obtained by applying test signals on the DUT.
The pin electronics unit 110 includes a plurality of pin electronics circuits 110a to 110n which have a driver 111, a high-side comparator 112, and a low-side comparator 113. Each of the pin electronics circuits 110a to 110n is used for one of pins of the DUT 200. The driver 111 generates a test signal which is applied to the DUT 200. The high-side comparator 112 is a circuit that compares a signal output from the DUT 200 with a predetermined reference voltage (VH) and outputs a signal which indicates the comparison result. The low-side comparator 113 is a circuit that compares a signal output from the DUT 200 with a predetermined reference voltage (VL) which is lower than the reference voltage (VH), and outputs a signal which indicates the comparison result.
The selector 120 is a circuit that selects one of the signals output from each of the high-side comparators 112 provided in the pin electronics circuits 110a to 110n, and outputs it. The selector 130 is a circuit that selects one of the signals output from each of the low-side comparators 113 provided in the pin electronics circuits 110a to 110n, and outputs it. The time measuring circuit 140 has an input channel (Ach) to which a signal selected by the selector 120 is input, and an input channel (Bch) to which a signal selected by the selector 130 is input. The time measuring circuit 140 measures a cycle and a frequency of a signal input to either one of these input channels, or measures a time difference between the signals input to both of these input channels. Signals to be selected by selectors 120 and 130, and measurement to be performed in the time measuring circuit 140 are set under control of a control device (not shown in the figures).
An operation is described in the case of measuring a time difference between signals output from two arbitrary pins (pins P101 and P102 in the example shown in FIG. 4) of the DUT 200, using the semiconductor test device 100 configured as above. Either two of the pin electronics circuits 110a to 110n (for example, the pin electronics circuits 110a and 110b) provided in the pin electronics unit 110 are connected to the pins P101 and P102 of the DUT 200, respectively. Under control of the control device (not shown in the figures), the selectors 120 and 130 are set so that signals output from the pin electronics circuits 110a and 110b are selected. Furthermore, under control of the device, the time measuring circuit 140 is set so that the time is measured from when a signal is input to the input channel (Ach) to when a signal is input to the input channel (Bch).
After completion of the above settings, application of test signals to the DUT 200 starts, and signals corresponding to the test signals are output from the pins P101 and P102 of the DUT 200. These signals are input to the pin electronics circuits 110a and 110b, respectively, and compared with the reference voltages (VH, VL). The signals which indicate the comparison results are then output to each of the selectors 120 and 130 from the pin electronics circuits 110a and 110b. The selector 120 selects the signal from the high-side comparator 112 in the pin electronics circuit 110a. The selector 130 selects the signal from the low-side comparator 113 in the pin electronics circuit 110b. The time measuring circuit 140 measures the time from when the signal selected by selector 120 is input to the input channel (Ach) of the time measuring circuit 140 to when the signal selected by selector 130 is input to the input channel (Bch) of the time measuring circuit 140. As a result, the time difference between the signals output from the pins P101 and P102 of the DUT 200 is measured.
FIG. 4 shows a configuration which is necessary to test a single DUT 200 in order to simplify the description. If a plurality of DUT are tested simultaneously, a semiconductor test device is required to be configured to include a plurality of selectors 120 and 130, and a plurality of time measuring circuits 140 which are shown in FIG. 4. The number of DUT 200 which can be tested by the semiconductor test device 100 simultaneously depends on the number of the time measuring circuits 140 provided in the semiconductor test device 100. Here, it is assumed that the semiconductor test device 100 is merely configured to include a plurality of selectors 120 and 130. In this configuration, if the number of tests carried out to the DUT 200 simultaneously is large, the scale of circuits and the number of wirings are dramatically increased. FIG. 5 shows a configuration of portions of a conventional semiconductor test device which can perform a plurality of tests on DUT simultaneously while suppressing an increase in the scale of circuits and the number of wirings. In FIG. 5, the total number of the pin electronics circuits 110a to 110n provided in the pin electronics unit 110 is 512.
The semiconductor test device shown in FIG. 5 includes eight selectors 151 to 158 which are positioned at a front stage and three selectors 161 to 163 which are positioned at a rear stage. FIG. 5 shows a configuration in which three time measuring circuits 140 are provided in the semiconductor test device. Each of the selectors 151 to 158 is provided for each of 64 of 512 pin electronics circuits. Each of the selectors 151 to 158 selects one of 64 signals and outputs it. The selectors 161 to 163 receive each of the eight signals selected by the selectors 151 to 158, select one of the received eight signals and output it. The signals selected by the selectors 161 to 163 are output to the three time measuring circuits 140, respectively. By configuring the semiconductor test device as above, it is possible to test three DUT 200 simultaneously while suppressing an increase in the scale of the circuits and the number of wirings.
For detail of the conventional semiconductor test device which can measure, for example, a time interval between two signals output from a DUT, refer to, for example Japanese Patent Publication No. 3594135.
The time measuring circuit 140 provided in the conventional semiconductor test device has only two input channels. Thus, for example, when a DUT which outputs three or more signals such as three-phase PWM (Pulse Width Modulation) signals are tested, it is impossible to measure time differences between a plurality of signals simultaneously. Conventionally, when such a DUT is subjected to tests, the time difference between two selected signals among a plurality of signals is measured multiple times while changing combinations of selected signals. Therefore, there is a problem that a long time is required for tests.
Moreover, in the conventional semiconductor test device, if the number of DUT to be tested simultaneously is increased greatly, it is required to increase the number of the selectors 151 to 158 at the front stage. However, if the number of the selectors 151 to 158 at the front stage is increased, the number of wirings is largely increased and the circuit scale of the selectors 161 to 163 at the rear stage is increased. Thus, it is not easy to increase the number of DUT to be tested simultaneously.
Furthermore, in the conventional semiconductor test device shown in FIG. 5, the allocation of pins of the DUT 200 cannot be performed freely because of constraints due to the selectors 151 to 158 at the front stage. For example, the selector 151 is used for selecting and outputting one of the signals output from first to sixty-fourth pin electronics circuits. Thus, it is impossible to allocate two of the 64-pin electronics circuits connected to the selector 151 to two pins of the DUT 200 so as to measure a time difference between signals output from these pins. Because of such constraints, there is a problem that wiring of connecting wirings which connect pin electronics circuits with DUT is complicated.